Modern day electronics include components that use integrated circuits. Integrated circuits, commonly known as “chips” are electronic circuits formed using Silicon as a substrate and by adding impurities to form solid-state electronic devices, such as transistors, diodes, and resistors.
Circuit designers use a variety of software tools to design electronic circuits that accomplish an intended task. The software tools used for designing ICs produce, manipulate, or otherwise work with the circuit layout at very small scales. Some of the components that such a tool may manipulate may only measure tens of nanometer across when formed in Silicon. The designs produced and manipulated using these software tools are complex, often including millions of such components interconnected to form an intended electronic circuitry.
A threshold voltage is a voltage required to operate a component in a circuit. For example, a metal oxide field effect transistor (MOSFET) has a gate that operates at a threshold voltage. When the threshold voltage or a higher voltage is applied to the gate the MOSFET is turned on and provides a conductive path. When the voltage applied to the gate is below the threshold voltage the MOSFET is turned off.
Once a design layout (layout) has been finalized for an IC, the design is converted into a set of masks or reticles for photolithography. A layout includes shapes that the designer selects and positions to achieve a design function.
A common component on chips is memory. Memory consists of an array of bit cells, each capable of storing a single bit (true/false) value. Chip performance is heavily dependent on the amount of memory placed on the chip, hence there is advancement in chip design for ever increasing memory arrays. Bit cells can fail, however, due to manufacturing variations in parameters such as the threshold voltage. In order to make a working array, these bit fail rates have to be very small. Techniques exist for estimating the cell failure rate of a memory array design. The number of defective devices, or device yield loss, is related to the cell failure rate. For example, in order to achieve a yield of ninety percent in a one-million cell array without redundancy, a failure rate below one in five million must be held.
Another common component on chips is latches. Latches are similar to memory bit cells, and a large number of them exist on a given chip. Latch failure rates must also be kept very low in order to insure overall functionality. The traditional method of choice for assessing such failure rates is the Monte Carlo method.
Techniques such as Monte Carlo analysis produce accurate results at a cost of a large number of simulations, due to the random sampling of the entire probability space of the variables that are treated in the analysis. As the circuit failure rate decreases, the number of samples required for accurate analysis becomes increasingly large, because of the relatively sparse distribution of samples in the distribution tail(s) that correspond to failed circuits.
Monte Carlo simulation is a tool for understanding the statistical behavior of complex systems. The effect of circuit changes are difficult to estimate at very low failure rate levels, therefore, low failure rates cause further complications for adjusting designs to achieve the best result. However, Monte Carlo simulation becomes inefficient when one needs to study behavior in the tails of the input distributions. Because such rare event simulation is important for understanding many circuit behaviors, importance sampling methods have been developed to explore the tail regions. One such method, mixture importance sampling, is used for simulation of memory cells, which are simpler circuits with fewer variables than other types of more complex circuits.